Transmetteurs photoniques sur silicium pour les transmissions optiques à grande capacité

Les applications exigeant des très nombreuses données (médias sociaux, diffusion vidéo en continu, mégadonnées, etc.) se développent à un rythme rapide, ce qui nécessite de plus en plus de liaisons optiques ultra-rapides. Ceci implique le développment des transmetteurs optiques intégrés et à bas coût et plus particulirement en photonique sur silicium en raison de ses avantages par rapport aux autres technologies (LiNbO3 et InP), tel que la compatibilité avec le procédé de fabrication CMOS. Les modulateurs optoélectronique sont un élément essentiel dans la communication op-tique. Beaucoup de travaux de recherche sont consacrées au développement de dispositifs optiques haut débit efficaces. Cependant, la conception de modulateurs en photonique sur sili-cium (SiP) haut débit est diffcile, principalement en raison de l'absence d'effet électro-optique intrinsèque dans le silicium. De nouvelles approches et de architectures plus performances doivent être développées afin de satisfaire aux critères réliés au système d'une liaison optique aux paramètres de conception au niveau du dispositif integré. En outre, la co-conception de circuits integrés photoniques sur silicium et CMOS est cruciale pour atteindre tout le potentiel de la technologie de photonique sur silicium. Ainsi cette thèse aborde les défits susmentionnés. Dans notre première contribution, nous préesentons pour la première fois un émetteur phononique sur silicium PAM-4 sans utiliser un convertisseur numérique analog (DAC)qui comprend un modulateur Mach Zehnder à électrodes segmentées SiP (LES-MZM) implémenté dans un procédé photonique sur silicium générique avec jonction PN latérale et son conducteur CMOS intégré. Des débits allant jusqu'à 38 Gb/s/chnnel sont obtenus sans utili-ser un convertisseur numérique-analogique externe. Nous présentons également une nouvelle procédure de génération de délai dans le excitateur de MOS complémentaire. Un effet, un délai robuste aussi petit que 7 ps est généré entre les canaux de conduite. Dans notre deuxième contribution, nous présentons pour la première fois un nouveau fac-teur de mérite (FDM) pour les modulateurs SiP qui inclut non seulement la perte optique et l'efficacité (comme les FDMs précédents), mais aussi la bande passante électro-optique du modulateur SiP (BWEO). Ce nouveau FDM peut faire correspondre les paramètres de conception physique du modulateur SiP à ses critères de performance au niveau du système, facilitant à la fois la conception du dispositif optique et l'optimisation du système. Pour la première fois nous définissons et utilisons la pénalité de puissance du modulateur (MPP) induite par le modulateur SiP pour étudier la dégradation des performances au niveau du système induite par le modulateur SiP dans une communication à base de modulation d'amplitude d'impulsion optique. Nous avons développé l'équation pour MPP qui inclut les facteurs de limitation du modulateur (perte optique, taux d'extinction limité et limitation de la bande passante électro-optique). Enfin, dans notre troisième contribution, une nouvelle méthodologie de conception pour les modulateurs en SiP intégré à haute débit est présentée. La nouvelle approche est basée sur la minimisation de la MPP SiP en optimisant l'architecture du modulateur et le point de fonctionnement. Pour ce processus, une conception en longueur unitaire du modulateur Mach Zehnder (MZM) peut être optimisée en suivant les spécifications du procédé de fabrication et les règles de conception. Cependant, la longueur et la tension de biais du d'éphaseur doivent être optimisées ensemble (par exemple selon vitesse de transmission et format de modulation). Pour vérifier l'approche d'optimisation proposée expérimentale mont, a conçu un modulateur photonique sur silicium en phase / quadrature de phase (IQ) ciblant le format de modulation 16-QAM à 60 Gigabaud. Les résultats expérimentaux prouvent la fiabilité de la méthodologie proposée. D'ailleurs, nous avons augmenté la vitesse de transmission jusqu'à 70 Gigabaud pour tester la limite de débit au système. Une transmission de données dos à dos avec des débits binaires de plus de 233 Gigabit/s/channel est observée. Cette méthodologie de conception ouvre ainsi la voie à la conception de la prochaine génération d'émetteurs intégrés à double polarisation 400+ Gigabit/s/channel.Data-hungry applications (social media, video streaming, big data, etc.) are expanding at a fast pace, growing demand for ultra-fast optical links. This driving force reveals need for low-cost, integrated optical transmitters and pushes research in silicon photonics because of its advantages over other platforms (i.e. LiNbO3 and InP), such as compatibility with CMOS fabrication processes, the ability of on-chip polarization manipulation, and cost effciency. Electro-optic modulators are an essential component of optical communication links and immense research is dedicated to developing effcient high-bitrate devices. However, the design of high-capacity Silicon Photonics (SiP) transmitters is challenging, mainly due to lack of inherent electro-optic effect in silicon. New design methodologies and performance merits have to be developed in order to map the system-level criteria of an optical link to the design parameters in device-level. In addition, co-design of silicon photonics and CMOS integrated circuits is crucial to reveal the full potential of silicon photonics. This thesis addresses the aforementioned challenges. In our frst contribution, for the frst time we present a DAC-less PAM-4 silicon photonic transmitter that includes a SiP lumped-element segmented-electrode Mach Zehnder modula-tor (LES-MZM) implemented in a generic silicon photonic process with lateral p-n junction and its co-designed CMOS driver. Using post processing, bitrates up to 38 Gb/s/channel are achieved without using an external digital to analog converter. We also presents a novel delay generation procedure in the CMOS driver. A robust delay as small as 7 ps is generated between the driving channels. In our second contribution, for the frst time we present a new figure of merit (FOM) for SiP modulators that includes not only the optical loss and effciency (like the prior FOMs), but also the SiP modulator electro-optic bandwidth ( BWEO). This new FOM can map SiP modulator physical design parameters to its system-level performance criteria, facilitating both device design and system optimization. For the frst time we define and employ the modulator power penalty (MPP) induced by the SiP modulator to study the system level performance degradation induced by SiP modulator in an optical pulse amplitude modulation link. We develope a closed-form equation for MPP that includes the SiP modulator limiting factors (optical loss, limited extinction ratio and electro-optic bandwidth limitation). Finally in our third contribution, we present a novel design methodology for integrated high capacity SiP modulators. The new approach is based on minimizing the power penalty of a SiP modulator (MPP) by optimizing modulator design and bias point. For the given process, a unit-length design of Mach Zehnder modulator (MZM) can be optimized following the process specifications and design rules. However, the length and the bias voltage of the phase shifter must be optimized together in a system context (e.g., baud rate and modulation format). Moreover, to verify the proposed optimization approach in experiment, we design an in-phase/quadrature-phase (IQ) silicon photonic modulator targeting 16-QAM modulation format at 60 Gbaud. Experimental results proves the reliability of our proposed methodology. We further push the baud rate up to 70 Gbaud to examine the capacity boundary of the device. Back to back data transmission with bitrates more than 233 Gb/s/channel are captured. This design methodology paves the way for designing the next generation of integrated dual- polarization 400+ Gb/s/channel transmitters

Assessing performance of silicon photonic modulators for pulse amplitude modulation

Silicon photonic (SiP) electro-optic modulators are a key component in cost-efficient and integrated optical transmitters. Modulator design traditionally uses figure of merits (FOMs) that characterize modulation efficiency and propagation loss of light, which underestimate the modulator-induced power penalty due to intersymbol interference, as they do not consider the electro-optic bandwidth limitation. We show that in the presence of limited electro-optic bandwidth of the SiP modulator, the conventional FOMs, such as VπL and V παL, are unable to predict the minimum transmitter power penalty (TPP). Normalized optical modulation amplitude (OMAN) is proved through simulation to be a reliable tool to predict the minimal TPP point. Then, we introduce a new FOM that includes not only the efficiency of the modulator, but also the bandwidth limitation from the SiP electro-optic modulator. The new FOM that is derived from OMAN translates the system-level requirements of a PAM-M optical link to the device-level design parameters. This FOM can be hired to optimize driving voltage swing, bias voltage, and phase-shifter length or to simply choose a SiP modulator with minimal imposed TPP

High-efficiency silicon photonic modulator using coupled Bragg grating resonators

We propose a novel design of a silicon photonic modulator that has a high modulation efficiency and that is tolerant to temperature variations. A series of phase-shifted Bragg gratings are placed in each arm of a Mach-Zehnder interferometer in order to provide enhanced phase modulation. The slow light effect in these ultra-compact coupled resonators improves phase modulation efficiency compared to conventional silicon phase shifters. These Bragg grating cavities are designed such that the optical bandwidth is increased compared to other coupled resonators such as micro-rings. This improved bandwidth reduces the temperature sensitivity of the devices. We present in detail how to optimize these modulators considering properties such as modulation efficiency (Vπ×L), optical modulation amplitude (OMA), and optical bandwidth (λBW); the latter property determining the operating temperature range (T). As examples, we present two designs that meet different target specifications for short-reach or long-haul applications. We further provide a model, based on coupled mode theory, to investigate the dynamic response of the proposed modulators. A large signal analysis is performed using finite difference time domain (FDTD) in order to simulate on/off keying (OOK) modulation and eye diagrams up to 110 Gb/s

Silicon photonic modulator based on coupled Bragg grating resonators used as phase shifters

Bragg gratings with phase-shifts are inserted in a Mach-Zehnder modulator to enhance phase modulation, reduce device length and improve efficiency (Vπ×L=0.28 Vcm). Simulations show 3 nm optical bandwidth corresponding to 50 K operating temperature range

Single-carrier 72 GBaud 32QAM and 84 GBaud 16QAM transmission using a SiP IQ modulator with joint digital-optical pre-compensation

We establish experimentally the suitability of an all-silicon optical modulator to support future ultra-high-capacity coherent optical transmission links beyond 400 Gb/s. We present single-carrier data transmission from 400 Gb/s to 600 Gb/s using an all-silicon IQ modulator produced with a generic foundry process. The operating point of the silicon photonic transmitter is carefully optimized to find the best efficiency bandwidth trade-off. We present a methodology to split pre-compensation between digital and optical stages. For the 400 Gb/s transmission, we achieved 60 Gbaud dual-polarization (DP)-16QAM, reaching a distance of 1,520 km. Transmission of 500 Gb/s was further tested using 75 Gbaud 16QAM and 60 Gbaud 32QAM, reaching 1,120 km and 480 km, respectively. We finally demonstrated 72 Gbaud DP-32QAM (720 Gb/s) transmitted over 160 km and 84 Gbaud DP-16QAM (672 Gb/s) transmitted over 720 km, meeting the threshold for 20% forward error correction overhead and achieving net rates of 600 Gb/s and 576 Gb/s, respectively. To the best of our knowledge, these are the highest baud-rate coherent transmission results achieved using an all-silicon IQ modulator. We have demonstrated that we can reap the myriad advantages of SiP integration for transmission at extreme bit rates

Silicon Photonic IQ Modulators for 400 Gb/s and beyond

Silicon photonics has enormous potential for ultrahigh-capacity coherent optical transceivers. We demonstrate an IQ modulator using silicon photonic traveling-wave modulators optimized for higher-order quadrature amplitude modulation (QAM). Its optical and RF characteristics are studied thoroughly in simulation and experiment. We propose a system-orientated approach to optimization of the silicon photonic IQ modulator, which minimizes modulator-induced power penalty in a QAM transmission link. We examine the trade-off between modulation efficiency and bandwidth for the optimal combination of modulator length and bias voltage to maximize the clear distance between adjacent constellation points. This optimum depends on baud rate and modulation format, as well as achievable driving voltage swing. Measured results confirm our prediction using the proposed methodology. Without pre-compensating bandwidth limitation of the modulator, net data rates up to 232 Gb/s (70 Gbaud 16-QAM) on single polarization are captured, indicating great potential for 400+ Gb/s dual-polarization transmission

Silicon photonic modulators for PAM transmissions

High-speed optical interconnects are crucial for both data centers and high performance computing systems. High power consumption and limited device bandwidth have hindered the move to higher optical transmission speeds. Integrated optical transceivers in silicon photonics (SiP) using pulse-amplitude modulation (PAM) are a promising solution to increase data rates. In this paper, we review recent progress in SiP for PAM transmissions. We focus on materials and technologies available CMOS-compatible photonics processes. Performance metrics of SiP modulators and crucial considerations for high-speed PAM transmissions are discussed. Various driving strategies to achieve optical PAM signals are presented. Some of the state-of-the-art SiP PAM modulators and integrated transmitters are reviewed

Time-domain large-signal modeling of traveling-wave modulators on SOI

Silicon photonic modulators have strong nonlinear behavior in phase modulation and frequency response, which needs to be carefully addressed when they are used in highcapacity transmission systems. We demonstrate a comprehensive model for depletion-mode Mach–Zehnder modulators (MZMs) on silicon-on-insulator, which provides a bridge between device design and system performance optimization. Our methodology involves physical models of p–n–junction phase-shifters and traveling-wave electrodes, as well as circuit models for the dynamic microwave-light interactions and time-domain analysis. Critical aspects in the transmission line design for high-frequency operation are numerically studied for a case of p–n–junction loaded coplanar-strip electrode. The dynamic interaction between light and microwave is simulated using a distributed circuit model solved by the finite-difference time-domain method, allowing for accurate prediction of both small-signal and large-signal responses. The validity of the model is confirmed by the comparison with experimental results for a series push–pull MZM with a 6 mm phase shifter. The simulation shows excellent agreement with experiment for high-speed operation up to 46 Gb/s. We show that this time-domain model can well predict the impact of the nonlinear behavior on the large-signal response, in contrast to the poor prediction from linear models in the frequency domain

Transmission of 120 Gbaud QAM with an all-silicon segmented modulator

Segmenting a silicon modulator can substantially increase its electro-optic bandwidth without sacrificing modulation efficiency. We demonstrate a segmented silicon IQ modulator and experimentally explore both modulator design and operating point to optimize systems trade-offs in coherent detection. An electro–optic bandwidth of greater than 40 GHz is measured for a 4-mm-long segment, and greater than 60 GHz for a 2-mmlong segment. We evaluate optical transmission experimentally at 120 Gbaud for 16-ary quadrature amplitude modulation (QAM) and 32QAM. The segments are operated in tandem with identical data at each segment. We present an experimental method to align data timing between the segments. Through the optimization of segment biasing and linear compensation, we have achieved a bit error rate (BER) of 16QAM well below the 20% forward error correction (FEC) threshold (2 × 10−2 ). Adding nonlinear pre-compensation allows for 32QAM with a BER below the 24% FEC threshold (4.5 × 10−2 ), enabling a net rate of 483 Gbs per polarization. The modulator can also be operated as an optical digital analogy converter for complex optical signal generation, for which 100 Gbs is achieved for a proof of concept

CMOS-photonics co-design of an integrated DAC-less PAM-4 silicon photonic transmitter

Codesign and integration of optical modulators and CMOS drivers is crucial for high-speed silicon photonic (SiP) transmitters to reach their full potential for low-cost, low-power electronic-photonic integrated systems. We present a CMOS-driven SiP multi-level optical transmitter implemented using a commercially available lateral p-n junction process. It uses a Mach-Zehnder modulator (MZM) segmented to increase speed and to lower the required power on a per segment basis to a level achievable with CMOS. A multi-channel driver is designed and implemented in 130 nm RF CMOS, providing a swing of 4 V in a push-pull configuration at 20 Gbaud. Binary data at the CMOS input is manipulated via digital logic to produce the proper per-segment drive signals to generate a four-level pulse-amplitude modulation optical signal. Multi-level modulation is achieved using only binary signals as input (DAC-less). Cosimulation of the optical and electrical circuits shows good agreement with experiment. Reliable transmission is achieved without post-compensation at 28 Gb/s, and at 38 Gb/s when using post-compensation